Part Number Hot Search : 
VOL60 CH1LDS AK4964Z LTM8022V SSD01L60 TIP126 NCE6075 RN141S
Product Description
Full Text Search
 

To Download MP6900DS-LF-Z Datasheet File

  If you can't view the Datasheet, Please click here to try to view without PDF Reader .  
 
 


  Datasheet File OCR Text:
  mp6900 fast turn-off intelligent controller mp6900 rev. 1.13 www.monolithicpower.com 1 6/23/2014 mps proprietary information. patent protected. patent protected. unauthorized photocopy and duplication prohibited. ? 2014 mps. all rights reserved. the future of analog ic technology description the mp6900 is a low-drop, fast turn-off intelligent controller that combined with an external switch replaces schottky diodes in high-efficiency, flyback converters. the chip regulates the forward drop of an external switch to about 70mv and switches it off as soon as the voltage becomes negative. package choices are a space saving tsot23-5, qfn6 (3x3mm) or soic-8. features ? works with both standard and logic level fets ? compatible with energy star, 1w standby requirements ? v dd range from 8v to 24v ? 70mv v ds regulation function (1) ? fast turn-off total delay of 20ns ? max 400khz switching frequency ? <3ma low quiescent current ? supports ccm, dcm and quasi-resonant topologies ? supports high-side and low-side rectification ? power savings of up to 1.5w in a typical notebook adapter applications ? industrial power systems ? distributed power systems ? battery powered systems ? flyback converters a ll mps parts are lead-free and adhere to the rohs directive. for mps green status, please visit mps website under products, quality assurance page. ?mps? and ?the future of analog ic technology? are registered trademarks o f monolithic power systems, inc. notes: 1) related issued patent: us patent us8,067,973; cn paten t zl201010504140.4. other patents pending. typical application
mp6900- fast turn-off intelligent controller mp6900 rev. 1.13 www.monolithicpower.com 2 6/23/2014 mps proprietary information. patent protected. patent protected. unauthorized photocopy and duplication prohibited. ? 2014 mps. all rights reserved. ordering information part number package top marking mp6900dj* tsot23-5 6d mp6900ds** soic-8 mp6900ds mp6900dq*** qfn6 (3x3mm) 5d * for tape & reel, add suffix ?z (e.g. mp6900dj?z). for rohs compliant packaging, add suffix ?lf (e.g. mp6900dj?lf?z) ** for tape & reel, add suffix ?z (e.g. mp6900ds?z). for rohs compliant packaging, add suffix ?lf (e.g. mp6900ds?lf?z) *** for tape & reel, add suffix ?z (e.g. mp6900dq?z). for rohs compliant packaging, add suffix ?lf (e.g. mp6900dq?lf?z) package reference top view v g v ss v dd 1 2 3 5 4 pgnd v d marking pgnd en nc v d v g nc v dd v ss 1 2 3 4 8 7 6 5 top view tsot23-5 soic-8 qfn6 (3x3mm) absolute maximum ratings (2) v dd to v ss ..................................... -0.3v to +27v pgnd to v ss ............................... -0.3v to +0.3v v g to v ss ......................................... -0.3v to v cc v d to v ss .................................... -0.7v to +180v en to v ss .................................... -0.3v to +6.5v maximum operating frequency ............. 400khz continuous power dissipation (t a = +25c) (3) soic8 ...................................................... 1.39w tsot23-5 ................................................ 0.57w qfn6 (3x3mm) .......................................... 2.5w junction temperature .............................. 150 c lead temperature (solder ) ...................... 260 c storage temperature .............. -55c to +150 c recommended operation conditions (4) v dd to v ss ........................................... 8v to 24v operating junction temp. (t j ). ... -40c to +125c thermal resistance (5) ja jc soic8 .................................... 90 ...... 45 ... c/w tsot23-5 ............................. 220 .... 110 .. c/w qfn6 (3x3mm) ...................... 50 ...... 12 ... c/w notes: 2) exceeding these ratings may damage the device. 3) the maximum allowable power dissipation is a function of the maximum junction temperature. t j (max) the junction-to- ambient thermal resistance ja and the ambient temperature t a . the maximum allowable power dissipation at any ambien t temperature is calculated using: p d (max)=(t j (max)-t a )/ ja . exceeding the maximum allowable power dissipation will cause excessive die temperature, and the regulator will go into thermal shutdown. internal thermal shutdown circuitry protects the device from permanent damage. 4) the device is not guaranteed to function outside of its operating conditions. 5) measured on jesd51-7, 4-layer pcb.
mp6900- fast turn-off intelligent controller mp6900 rev. 1.13 www.monolithicpower.com 3 6/23/2014 mps proprietary information. patent protected. patent protected. unauthorized photocopy and duplication prohibited. ? 2014 mps. all rights reserved. electrical characteristics v dd = 12v, t a = +25 c, unless otherwise noted. paramete r conditions min typ max units v dd voltage range 8 24 v v dd uvlo rising 5.0 6.0 7.0 v v dd uvlo hysteresis 1.2 v operating current c load =5nf, sw =100khz 8 12 ma quiescent current no switching 2 3 ma shutdown current v dd =4 v 100 150 a v dd =20v en=0v (50k ) 250 a thermal shutdown 170 o c thermal shutdown hysteresis 50 o c enable (low) soic-8 only 0.8 v enable (high) soic-8 only 2 v pull-up current on enable soic-8 only 5 10 a control circuitry section v ss ?v d forward voltage, vfwd 55 70 85 mv turn-on delay c load = 5nf 150 ns c load = 10nf 200 ns pull-down resistance of v g pin 10 20 k input bias current on v d pin -0.3v > v d >180v 10 a minimum on-time c load = 5nf 200 ns gate driver section v g (low) i load =1ma 0.05 0.5 v v g (high) v dd >17v 12 13.5 15 v v dd <17v v dd -2.2 turn-off threshold (v ss -v d ) 20 30 40 mv turn-off propagation delay v d =v ss , r gate =0 15 ns turn-off total delay (6) v d =v ss , c load =5nf, r gate =0 20 35 ns v d =v ss , c load =10nf, r gate =0 30 45 ns pull-down impedance 1 2 pull-down current 3v mp6900- fast turn-off intelligent controller mp6900 rev. 1.13 www.monolithicpower.com 4 6/23/2014 mps proprietary information. patent protected. patent protected. unauthorized photocopy and duplication prohibited. ? 2014 mps. all rights reserved. pin functions tsot23-5 pin # soic8 pin # qfn6 (3x3mm) pin # name description 1 8 6 vg gate drive output 2 5 4 vss ground, also used as reference for vd 3 6 5 vdd supply voltage 4 4 3 vd fet drain voltage sense 5 1 1 pgnd power ground, return for driver switch - 2 2 en enable pin, active high - 3 nc no connection - 7 nc no connection
mp6900- fast turn-off intelligent controller mp6900 rev. 1.13 www.monolithicpower.com 5 6/23/2014 mps proprietary information. patent protected. patent protected. unauthorized photocopy and duplication prohibited. ? 2014 mps. all rights reserved. typical performance characteristics v dd = 12v, unless otherwise noted. v fwd vs. temperature -50 0 50 100 150 v fwd (mv) turn off threshold vs. temperature -40 -35 -30 -25 -20 -50 0 50 100 150 turn off threshold (v) quiescent current vs. temperature 1 1.2 1.4 1.6 1.8 2 2.2 2.4 -50 0 50 100 150 quiescent current (ma) shutdown current vs. temperature 50 100 150 200 -50 0 50 100 150 5 5.5 6 6.5 7 -50 0 50 100 150 v dd uvlo rising (v) v dd uvlo rising vs. temperature v ds 50v/div v gs 5v/div i sd 10a/div operation in 90w flyback application (5) (v in =90vac, i out =1a) operation in 90w flyback application (v in =90vac, i out =4.7a) v ds 50v/div v gs 10v/div i sd 10a/div operation in 90w flyback application (v in =250vac, i out =1a) v ds 50v/div v gs 5v/div i sd 10a/div operation in 90w flyback application (v in =250vac, i out =4.7a) v ds 50v/div v gs 10v/div i sd 10a/div 60 65 70 75 80 notes: 7) see fig.7 for the test circuit..
mp6900- fast turn-off intelligent controller mp6900 rev. 1.13 www.monolithicpower.com 6 6/23/2014 mps proprietary information. patent protected. patent protected. unauthorized photocopy and duplication prohibited. ? 2014 mps. all rights reserved. block diagram figure 1?functional block diagram operation the mp6900 supports operation in ccm, dcm and quasi-resonant topologies. operating in either a dcm or quasi-resonant topology, the control circuitry controls the gate in forward mode and will turn the gate off when the mosfet current is fairly low. in ccm operation, the control circuitry turns off the gate when very fast transients occur. blanking the control circuitry contains a blanking function. when it pulls the mosfet on/off, it makes sure that the on/off state at least lasts for some time. the turn on blanking time is ~1.6us, which determines the minimum on-time. during the turn on blanking period, the turn off threshold is not totally blanked, but changes the threshold voltage to ~+50mv (instead of -30mv). this assures that the part can always be turned off even during the turn on blanking period. (albeit slower, so it is not recommended to set the synchronous period less than 1.6us at ccm condition in flyback converter, otherwise shoot through may occur) vd clamp because v d can go as high as 180v, a high- voltage jfet is used at the input. to avoid excessive currents when vg goes below -0.7v, a small resistor is recommended between v d and the drain of the external mosfet. under-voltage lockout (uvlo) when the vdd is below uvlo threshold, the part is in sleep mode and the vg pin is pulled low by a 10k resistor. enable pin the enable function is only available on the soic-8 package. if en is pulled low, the part is in sleep mode.
mp6900- fast turn-off intelligent controller mp6900 rev. 1.13 www.monolithicpower.com 7 6/23/2014 mps proprietary information. patent protected. patent protected. unauthorized photocopy and duplication prohibited. ? 2014 mps. all rights reserved. thermal shutdown if the junction temperature of the chip exceeds 170 o c, the vg will be pulled low and the part stops switching. the part will return to normal function after the junction temperature has dropped to 120 o c. thermal design if the dissipation of the chip is higher than 100mw due to switching frequencies above 100khz, vdd higher than 15v and/or cload larger than 5nf, it is recommended to use the thermally-enhanced soic-8. turn-on phase when the synchronous mosfet is conducting, current will flow through its body diode which generates a negative vds across it. because this body diode voltage drop (<-500mv) is much smaller than the turn on threshold of the control circuitry (-70mv), which will then pull the gate driver voltage high to turn on the synchronous mosfet after about 150ns turn on delay (defined in fig.2). as soon as the turn on threshold (-70mv) is triggered, a blanking time (minimum on-time: ~200ns) will be added during which the turn off threshold will be changed from -30mv to +50mv. this blanking time can help to avoid error trigger on turn off threshold caused by the turn on ringing of the synchronous mosfet. v ds v gate t don t doff -70mv -30mv 2v total t 5v figure 2?turn on and turn off delay conducting phase when the synchronous mosfet is turned on, vds becomes to rise according to its on resistance, as soon as vds rises above the turn on threshold (-70mv), the control circuitry stops pulling up the gate driver which leads the gate voltage is pulled down by the internal pull-down resistance (10k ? ) to larger the on resistance of synchronous mosfet to ease the rise of vds. by doing that, vds is adjusted to be around - 70mv even when the current through the mos is fairly small, this function can make the driver voltage fairly low when the synchronous mosfet is turned off to fast the turn off speed (this function is still active during turn on blanking time which means the gate driver could still be turned off even with very small duty of the synchronous mosfet). turn-off phase when vds rises to trigger the turn off threshold (- 30mv), the gate voltage is pulled to low after about 20ns turn off delay (defined in fig.2) by the control circuitry. similar with turn-on phase, a 200ns blanking time is added after the synchronous mosfet is turned off to avoid error trigger. fig.3 shows synchronous rectification operation at heavy load condition. due to the high current, the gate driver will be saturated at first. after vds goes to above -70mv, gate driver voltage decreases to adjust the vds to typical -70mv. fig 4 shows synchronous rectification operation at light load condition. due to the low current, the gate driver voltage never saturates but begins to decrease as soon as the synchronous mosfet is turned on and adjust the vds. -70mv -30mv vds isd vgs t0 t1 t2 figure 3?synchronous rectification operation at heavy load
mp6900- fast turn-off intelligent controller mp6900 rev. 1.13 www.monolithicpower.com 8 6/23/2014 mps proprietary information. patent protected. patent protected. unauthorized photocopy and duplication prohibited. ? 2014 mps. all rights reserved. -70mv -30mv vds isd vgs t0 t1 t2 figure 4?synchronous rectification operation at light load sr mosfet selection and driver ability the power mosfet selection proved to be a trade off between ron and qg. in order to achieve high efficiency, the mosfet with smaller ron is always preferred, while the qg is usually larger with smaller ron, which makes the turn-on/off speed lower and lead to larger power loss. for mp6900, because vds is regulated at ~-70mv during the driving period, the mosfet with too small ron is not recommend, because the gate driver may be pulled down to a fairly low level with too small ron when the mosfet current is still fairly high, which make the advantage of the low ron inconspicuous. fig.5 shows the typical waveform of qr flyback. assume 50% duty cycle and the output current is i out . to achieve fairly high usage of the mosfet?s ron, it is expected that the mosfet be fully turned on at least 50% of the sr conduction period: vfwd ron i ron ic vds out ? ? ? = ? = 2 where v ds is drain-source voltage of the mosfet and v fwd is the forward voltage threshold of mp6902, which is ~70mv. so the mosfet?s ron is recommended to be no lower than ~35/i out (m ? ). (for example, for 5a application, the ron of the mosfet is recommended to be no lower than 7m ? ) fig.6 shows the corresponding total delay during turn-on period (t total , see fig.2) with driving different qg mosfet by mp6902. from fig.6, with driving a 120nc qg mosfet, the driver ability of mp6900 is able to pull up the gate driver voltage of the mosfet to ~5v in 300ns as soon as the body diode of the mosfet is conducting, which greatly save the turn-on power loss in the mosfet?s body diode. id ipeak vg sr conduction period 50% sr conduction period ic ipeak? 4i out ic? 2i out figure 5?synchronous rectification typical waveforms in qr flyback turn-on delay vs . qg 0 50 100 150 200 250 300 350 0 20 40 60 80 100 120 140 qg (nc) total delay (ns) figure 6?total turn-on delay vs. q
mp6900- fast turn-off intelligent controller mp6900 rev. 1.13 www.monolithicpower.com 9 6/23/2014 mps proprietary information. patent protected. patent protected. unauthorized photocopy and duplication prohibited. ? 2014 mps. all rights reserved. typical application circuit p g n d p g n d p g n d 1 k r 1 0 p g n d 2 0 k r 7 n c r f 1 3 9 0 p c 1 5 5 1 k r 1 6 2 2 u f / 2 5 v c 1 1 t l 4 3 1 u 2 2 0 k r 2 3 a g n d 1 0 k r 2 8 1 0 0 n f c 1 6 2 k r 2 6 6 6 . 5 k r 2 7 a g n d n a r 2 9 1 m r 2 1 o h m s r 3 1 o h m s r 4 1 0 k r 1 2 1 5 0 k r 1 1 4 . 7 n f / 1 k v c 1 0 1 0 0 u f / 2 5 v c 1 4 0 . 1 u f / 2 5 v c 1 2 n c r 1 8 1 k r 2 4 n c c 8 1 u f / 5 0 v c 9 5 o h m s r t 1 2 2 p f c 1 3 1 0 n f c 5 0 . 2 2 u f / 2 5 0 v a c c x 1 u s 1 k - f d 2 1 m r 1 0 r 2 5 5 0 r 1 9 n c r 2 1 1 a f 1 1 1 c n 1 1 . 5 o h m s r 5 1 2 4 3 g b u 4 j b d 1 1 5 0 k r 1 3 a p 2 7 6 1 i q 1 2 4 2 4 m h l x 1 2 . 2 n f / 2 5 0 v a c c y 3 n c r 2 0 4 3 1 2 p c 8 1 7 b u 3 4 . 7 n f / 2 5 0 v a c c y 1 1 1 c n 2 4 . 7 n f / 2 5 0 v a c c y 2 c o m p 4 f s e t 5 g n d 3 v c c 6 s o u r c e 2 n c 7 d r v 1 h v 8 h f 0 2 0 0 v s v d v s s 5 v g 8 v d 4 n c 7 n c 3 p g n d 1 e n 2 v d d 6 m p 6 9 0 0 d s u 1 n c n c 1 n c r 6 v s v d 1 0 k r 1 5 d 4 1 k r 1 7 1 0 r 9 d 5 2 0 r 2 2 m 1 d 7 1 0 0 0 u f c 6 2 2 0 u f c 7 d 3 1 0 r 1 4 d 1 q 2 v g v g 1 u f c 4 1 0 0 u f c 1 1 1 1 3 8 1 0 3 1 6 4 t 1 4 5 : 9 : 7 : 7 e e 2 8 _ l p g n d a g n d a g n d v a u x v a u x figure 7?mp6900 for secondary synchronous controller in 90w flyback application
mp6900- fast turn-off intelligent controller mp6900 rev. 1.13 www.monolithicpower.com 10 6/23/2014 mps proprietary information. patent protected. patent protected. unauthorized photocopy and duplication prohibited. ? 2014 mps. all rights reserved. package information tsot23-5 0.30 0.50 seating plane 0.95 bsc 0.84 0.90 1.00 max 0.00 0.10 top view front view side view recommended land pattern 2.80 3.00 1.50 1.70 2.60 3.00 1 3 4 5 0.09 0.20 note: 1) all dimensions are in millimeters. 2) package length does not include mold flash, protrusion or gate burr. 3) package width does not include interlead flash or protrusion. 4) lead coplanarity (bottom of leads after forming) shall be 0.10 millimeters max. 5) drawing conforms to jedec mo-193, variation aa. 6) drawing is not to scale. 0.30 0.50 0 o -8 o 0.25 bsc gauge plane 2.60 typ 1.20 typ 0.95 bsc 0.60 typ see detail "a" detail  a
mp6900- fast turn-off intelligent controller mp6900 rev. 1.13 www.monolithicpower.com 11 6/23/2014 mps proprietary information. patent protected. patent protected. unauthorized photocopy and duplication prohibited. ? 2014 mps. all rights reserved. soic8 0.016(0.41) 0.050(1.27) 0 o -8 o detail "a" 0.010(0.25) 0.020(0.50) x 45 o see detail "a" 0.0075(0.19) 0.0098(0.25) 0.150(3.80) 0.157(4.00) pin 1 id 0.050(1.27) bsc 0.013(0.33) 0.020(0.51) seating plane 0.004(0.10) 0.010(0.25) 0.189(4.80) 0.197(5.00) 0.053(1.35) 0.069(1.75) top view front view 0.228(5.80) 0.244(6.20) side view 14 85 recommended land pattern 0.213(5.40) 0.063(1.60) 0.050(1.27) 0.024(0.61) note: 1) control dimension is in inches. dimension in bracket is in millimeters. 2) package length does not include mold flash, protrusions or gate burrs. 3) package width does not include interlead flash or protrusions. 4) lead coplanarity (bottom of leads after forming) shall be 0.004" inches max. 5) drawing conforms to jedec ms-012, variation aa. 6) drawing is not to scale. 0.010(0.25) bsc gauge plane
mp6900- fast turn-off intelligent controller notice: the information in this document is subject to change without notice. users should warrant and guarantee that third party intellectual property rights are not infringed upon w hen integrating mps products into any application. mps will not assume any legal responsibility for any said applications. mp6900 rev. 1.13 www.monolithicpower.com 12 6/23/2014 mps proprietary information. patent protected. patent protected. unauthorized photocopy and duplication prohibited. ? 2014 mps. all rights reserved. qfn6 (3x3mm) side view top view 1 6 4 3 bottom view 2.90 3.10 1.40 1.60 2.90 3.10 2.20 2.40 0.95 bsc 0.35 0.45 0.80 1.00 0.00 0.05 0.20 ref pin 1 id marking 1.50 0.95 0.40 recommended land pattern 2.90 note: 1) all dimensions are in millimeters . 2) exposed paddle size does not include mold flas h . 3) lead coplanarity shall be 0.10 millimeter max. 4) jedec reference is mo-229, variation veea-2. 5) drawing is not to scale . pin 1 id see detail a 2.30 0.80 pin 1 id option a r0.20 typ. pin 1 id option b r0.20 typ. detail a 0.35 0.55 pin 1 id index area


▲Up To Search▲   

 
Price & Availability of MP6900DS-LF-Z

All Rights Reserved © IC-ON-LINE 2003 - 2022  

[Add Bookmark] [Contact Us] [Link exchange] [Privacy policy]
Mirror Sites :  [www.datasheet.hk]   [www.maxim4u.com]  [www.ic-on-line.cn] [www.ic-on-line.com] [www.ic-on-line.net] [www.alldatasheet.com.cn] [www.gdcy.com]  [www.gdcy.net]


 . . . . .
  We use cookies to deliver the best possible web experience and assist with our advertising efforts. By continuing to use this site, you consent to the use of cookies. For more information on cookies, please take a look at our Privacy Policy. X